This invention relates, in general, to amplifiers, and more particularly to circuits for buffering a gain stage from an output stage.
A common form of an amplifier comprises an input gain stage (or first gain stage), a second gain stage, and an output stage. Those skilled in the art will also know that the second gain stage is often combined with the output stage. For this case, the output stage is defined as the circuitry which drives a load external to the amplifier. Each amplifier stage interacts with the other amplifier stages. This interaction affects performance of each amplifier stage as well as the overall performance of the amplifier. Design of an amplifier, in part, is the melding of each amplifier stage, which in some cases means compromising performance of a particular stage for the benefit of amplifier performance in total. Of particular concern is the effect of the output stage on the second gain stage, or more generally, a gain stage coupled to a high drive stage.
For example, the second gain stage provides an amplified voltage signal which is coupled to the output stage. The output stage generally does not have voltage gain but provides current drive to a load external to the amplifier. The output stage may be required to sink or source a current of significant magnitude depending on the external load. Under high drive conditions the output stage may present a low impedance load to the second gain stage. The second gain stage performance may be severely degraded by the low impedance load presented by the output stage for some circuit configurations. One approach to solve this problem is to add a buffer stage between the second gain stage and the output stage. Ideally, the buffer stage presents a high impedance load to the second gain stage while having the capability to drive a low impedance load (such as the input of an output stage).
A first circuit configuration of a buffer stage used between the second gain stage and an output stage is a bipolar transistor Darlington configuration. Those skilled in the art know that Darlington configured bipolar transistors have high current gain and high input impedance, both parameters are critical for the design of a good buffer stage. The Darlington configured buffer stage has been used successfully in an operational amplifier such as the MC33077 manufactured by Motorola Inc. The Darlington configured buffer stage is not without problems which limit its applications in many amplifier designs. The main problem with the Darlington configured buffer stage is that it affects the frequency response of the amplifier by adding phase shift which can cause amplifier instability when using feedback. The added phase shift contributed by the Darlington configured buffer stage is enough to limit amplifier performance or complicate the amplifier compensation scheme to the point where alternative circuit approaches are preferential to the Darlington configuration.
A second circuit configuration commonly used throughout the industry is a PNP bipolar transistor coupled to a current source. The PNP bipolar transistor is coupled to a gain stage in a voltage follower configuration for buffering the gain stage from a high drive stage. An example of this type of stage is in a MC33174 operational amplifier manufactured by Motorola Inc. PNP transistors in many semiconductor process flows have inferior performance characteristics than NPN transistors fabricated in the same process. This is the case for the MC33174 operational amplifier which must add additional circuitry to account for the performance deficiencies of using PNP transistors. Like the Darlington configured transistors a PNP based buffer stage adds phase shift to the amplifier loop, thus complicating amplifier compensation. Feed-forward capacitors are sometimes used to bypass the PNP transistor for high frequency signals due to the slow response time of the PNP transistor (adding more components to the amplifier design). If the PNP buffer stage is coupled to a differential gain stage, base current from the PNP buffer must be taken into account, otherwise, an offset could be induced into the amplifier. This is resolved by adding a dummy stage which mimics the base current from the PNP buffer but at the cost of more circuitry.
It would be of great benefit if a buffer stage could be developed which buffers a gain stage from an output stage (or high drive stage). The buffer stage should present a high impedance load to the gain stage, have the capability to drive a low impedance high drive stage, add minimal phase shift to the circuit, and keep component counts low.